TOPIC Embedded Products has developed an operating system that will significantly reduce the development time and cost of creating products based on FPGA+processor combinations, like the ZYNQ® of Xilinx. Our Dyplo system’s OS bridges the gap between hardware and software design, and provides a means to enable a fully software-driven development flow.
Dyplo extensively uses partial reconfiguration; an advanced design technique in which the FPGA fabric can (partially and selectively) change its hardware configuration on the fly. This allows for execution of different functions re-using the same FPGA fabric over time. Dyplo manages the reconfigurable blocks such that functions can be executed as desired, either in software or in hardware, depending on the execution context constraints, such as power consumption, performance etc.
Applying DYPLO on your development process provides opportunities for
- Accelerated system development using the operating system for ARM®+FPGA
- Software driven hardware development
- Managed partial reconfiguration
- Easy integration of (existing) IP-blocks (through use of AXI4 interfaces)