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v8 Secure EL1 problem

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Hi, arm experts,

 

    We want to use ARCH32 mode in secure EL1, I see some descriptions in ARM v8 Arch Reference Manual about Secure EL1 ARCH32 mode as follows:

 

    One is the VBAR(secure), it is mapped to  VBAR_EL3, the other is SCTLR (secure), it is mapped to SCTLR_EL3.

 

    That means secure EL1 and EL3 share VBAR and SCTLR?

  

    Moreover,  in SCTLR ARCH32 mode(G4.2.114 in v8 Reference Manual), write M(bit 0) only means EL1 and EL0 stage 1 address translation enabled,

 

   If EL1 and EL3 share SCTLR, how can I config it in ARCH32 mode?

 

   That really confuse me,  wait for your help, thank you!

 

Steven


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