IAR embedded workbench include files makes error
Hello everyone.I am a new in IAR and I don't know how to include build variables. I am using TM4C123G dev board. I downloaded the Tiva Ware peripheral driver libraries but I don't know how to set up...
View ArticleImpact of dev kits and packaged software on your projects?
It seems like there has been an upsurge in chip maker and 3rd party dev kits and packaged software aimed at jumpstarting Internet of Things projects. These dev kits are often marketed for ease of use...
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AllConnect SDK: Tuxera Streaming Technology
AllConnect SDK lets you interact with and control all the devices at home or in the car without having to worry about incompatible protocols and operating systems. Any application built on top of the...
View ArticleCortex-A8 performance
I'm working an a project on a Texas Instruments AM3517 Cortex-A8 processor. I was seeing less than expected performance, and did a simple comparison with a Cortex-M3 processor. The M3 performance was...
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Connected cars: who should have access to the data?
I read an interesting article this morning that highlights two competing forces currently at work in the automotive industry, between performance and privacy. On one hand you have technology companies...
View ArticleIssue on webgl on a chromium port with Mali 400 GPU.
Hi,I am working on a linux (directfb/fbdev) port of chromium on a set top box platform which has a Mali-400 GPU.I have an issue with an HTML application creating a webgl context in RGB (without...
View ArticleDoes the Cortex M0+ Single-Cycle IO Bus have an address bus to decode...
I have an interest in the M0+ single-cycle IO Bus interface.It seems that while the TRM describes a 32-bit bus, and a memory map it isn't clear if there is also an address bus to go along with this....
View ArticleStage 2 Page Table in AArch64 Hypervisor Slow
I'm developing a thin-hypervisor and have implemented Stage 2 Page Tables to protect and remap Exception Level (EL) 1/0 mappings. The issue I'm having is that dynamically constructing the page tables...
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Time is running out...DAC IP Track submissions due Jan. 20
DAC IP Track Submission Deadline January 20thDon't miss your opportunity to deliver a compelling technical paper at theDesign Automation Conference, June 7-11, 2015. Watch this short video by the DAC...
View ArticleCortex-M0 Thumb-2 instruction: Is this instruction valid?
STM r0!, {} I have looked at Thumb2 instruction set web but I can't find the behaviour of STM command if the reglist is empty. Thanks in advance.
View ArticleCan't Trace app with MGD 2.0.1
Hi, I'm trying to profile a game with MGD 2.0.1 without success. So far my status is that I successfully managed to connect to target in the MGD GUI but no trace data is displayed.Logcat is not...
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Best of the ARM Connected Community in 2014
Happy New Year! What is an online community?I had a conversation over the holiday break with a family member and he was intrigued to learn more about what I did on a day-to-day basis (one of those...
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ARM Trustzone需要什么硬件支持？
我想问一下，ARM TrustZone技术需要什么硬件支持，除了平常开发板所具备的内存、外设，以及Cortex-A处理器外，还需要什么硬件设备？？？
View ArticleARM Cortex A9 writing macros for different values of cache access rates
Hi,I am working on a project in the Zynq 7000 zc702 evaluation kit. It has an ARM Cortex A9 processor in it. I am trying to create a power model of the ARM Cortex A9 through regression analysis of the...
View ArticleXen server on arm processor (qualcomm 805 soc)
Will it be possible to port xen server onto a qualcomm 805 soc,Has it been done and where can i get the informationHow much effort will be necessary to xen server on to Qualcomm SOC (805 or 810) .port...
View Articleguest Android.
Hello, I am running Android as guest hosted by a bare metal minimal hypervisor on a dual core cortex a15 target. The hypervisor sets ttyS0 as a serial console and Android sets ttyS1, while on the host...
View ArticleACTLR[1] question in Cortex-A serias SOC
hi, experts:I found ACTLR register definition is different between Cortex-A7 and Cortex-A9.I have some questions about out cache concept in Cortex-A7.1. Some program disable outer cache by setting...
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How to install Mali-T6xx drivers?
Hi, all! Currently I'm working on an Arndale Octa board. It seems like mali is not available, there's no device like /dev/mali0 or so. I downloaded Kernel Device Drivers from...
View ArticleGLES3+ GL_DEPTH_COMPONENT16-32 on Nexus 10/Mali T604
So I'm trying to create a Multisampled depth texture and I'm seeing some oddities. First off, this GLES2-like call works :glTexImage2D( GL_TEXTURE_2D, 0, GL_DEPTH_COMPONENT, Width, Height, 0,...
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